Note: The job is a remote job and is open to candidates in USA. US Tech Solutions is a global staff augmentation and workforce solutions firm. The Hardware Design Engineer will work on the CT Server DDR team, focusing on DDR PHY channel and power delivery network architecture, system-level signal and power integrity modeling, and post-silicon validation. The role involves collaborating with design, package, board, and firmware teams to define specifications and debug issues across the full system stack.
Responsibilities
- Run system-level channel and PDN simulations (insertion/return loss, crosstalk, eye diagrams, impedance, IR drop, jitter transfer) and correlate with silicon results
- Able to process post-silicon SI/PI validation data and drive the next steps
- Debug SI/PI issues across silicon, package, and board, working with firmware and design teams
- Support cross-functional teams with system, channel, PDN, and decoupling implementation details
Skills
- Signal integrity (SI) and power integrity (PI) knowledge, including S-parameter/Z-parameter analysis, channel modeling, and PDN modeling
- Knowledge of Ansys or Cadence simulation tools (e.g., HFSS, SIwave, Sigrity, Clarity)
- System modeling with silicon-to-simulation correlation
- Firmware development for ATE and platforms
- Bachelors or Masters degree in Computer Engineering/Electrical Engineering
- Strong coding skills in Python and Matlab preferred
- System-level experience with firmware and hardware debug expertise preferred
Benefits
- Remote work arrangement
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