Note: The job is a remote job and is open to candidates in USA. NVIDIA is a technology company developing GPU and AI technologies, including products for artificial intelligence, consumer graphics, and self-driving cars. The GPU/SOC Low-Power Feature Architect will design next-generation high-speed interconnects, optimize IO power and energy efficiency, ensure interoperability, debug complex HSIO issues, and collaborate across engineering teams through product release.
Responsibilities
- Contribute to the design of the next generation of high-speed IOs, including NVLink and NVLink-C2C
- Responsible for IO power optimizations and continuing to push energy efficiency
- Ensure interoperability with connected devices and system components in complex interconnect topologies
- Deep dive into technically challenging HSIO bugs and help drive debug efforts across various teams
- Work closely and proactively with other engineering teams such as system architects, mixed signal and design, DGX, software/firmware, HW/SW QA, operations, and AE teams to drive design, development, debug, and release of next-generation products
Skills
- BS or MS degree in EE/CE or equivalent experience
- Minimum 10 years working on capacity - power management, use case analysis, perf/power modeling, bringup, and/or debug
- Experience with system-level and interconnect power management optimizations
- Silicon and platform-level power modeling for active/idle use cases
- Understanding of firmware/driver structures and their interaction with HW
- Track record of influence, leadership, and collaboration across multiple teams towards a unified goal
- Strong EE fundamentals, knowledgeable in computer architecture, high-speed interfaces, timing analysis, process variations, statistical error rates, and power analysis
Benefits
- You will also be eligible for equity and benefits.
- Hybrid work arrangement
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