Note: The job is a remote job and is open to candidates in USA. Tenstorrent develops high-performance RISC-V CPUs and AI computing technologies. The RISC-V CPU RTL Owner will develop next-generation CPU units by defining microarchitecture specifications, designing RTL, supporting verification and PPA closure, using AI-assisted design tools, and potentially mentoring junior engineers.
Responsibilities
- RISC-V CPU Unit Microarchitecture Specification: Define and develop microarchitecture specifications for the assigned unit (branch predictor, rename, instruction scheduling, vector execution, load/store, vector load/store support). The specification includes not only design, but also comprehensive analysis / strategy for verification and PPA (power, performance, area) closure
- RISC-V CPU Core Unit RTL Design: The candidate will be responsible for the quality of RTL including design verification and PPA closure. This includes writing RTL, reviewing / refining unit verification environment, applying right RTL optimization to control PPA
- AI Assisted Design Adaption: To maximize the team’s output, the candidate actively uses AI tools to accelerate the CPU design process
- Mentoring Junior Engineers: depending on a seniority of the engineer, the engineer may mentor junior members in the team
Skills
- Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field
- Proven track record of designing high-performance CPU RTL for x86, Arm, POWER, SPARC, or RISC-V
- Deep understanding of design verification strategy and trade-offs for verification methodology (simulation, formal, various checkers, etc…)
- Deep understanding of CPU microarchitecture and PPA trade-off
- Proficiency in hardware description languages (HDLs) such as Verilog, SystemVerilog or VHDL
- Excellent problem-solving abilities and analytical skills
- Strong communication skills, with the ability to convey complex technical concepts to diverse audiences
- Ability to work collaboratively in a team-oriented environment and across multiple disciplines
- This role is Remote, based out of The United States or Spain
- Basic understanding of RISC-V Architecture including V-extension is preferred
Benefits
- This role is Remote, based out of The United States or Spain.
Company Overview
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