Note: The job is a remote job and is open to candidates in USA. Vaspire Technologies Inc. is seeking a Physical Design Engineer to support ASIC physical implementation activities. The role performs block-level implementation and optimization to meet timing, power, area, and routing goals, including floorplanning, placement, clock tree synthesis, routing, timing closure, signoff fixes, and tape-out support.
Responsibilities
- Floorplanning and macro placement
- Placement optimization
- Clock Tree Synthesis (CTS)
- Routing and ECO implementation
- Timing closure support
- Congestion and utilization optimization
- DFM and signoff fixes
- Support tape-out activities
Skills
- ICC2/Fusion Compiler/Innovus expertise
- Understanding of ASIC implementation flow
- Timing analysis fundamentals
- CTS and routing concepts
- TCL, Perl, Python scripting
- LEF/DEF, Liberty, Verilog knowledge
- Basic understanding of IR/EM and Physical Verification
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