Note: The job is a remote job and is open to candidates in USA. Berkeley Lab's Applied Mathematics and Computational Sciences Division is seeking a Beyond Moore Computational Research Scientist to develop and evaluate devices for architectural specializations in high-performance computing applications. The role involves designing circuits and hardware accelerators, developing models for performance characterization, and mentoring graduate students and postdocs.
Responsibilities
- Design circuits, hardware accelerators and processor architectures using post-Moore devices to accelerate key HPC applications and application kernels
- Develop compact models and methodologies to use these circuits for performance and energy characterizations which can be used in architectural simulation framework for tightly integrating these accelerators into heterogeneous systems and SoCs that may contain multiple different kinds of accelerator devices
- Identify opportunities and challenges for devices to architectural design space exploration for several post-Moore devices to address those bottlenecks and develop circuit design models to determine the performance potential for those solutions
- Develop architectural and circuit models for emulation in FPGA hardware
- Develop metrics and benchmark tests in order to compare conventional CMOS based processors/accelerators and enhanced post-Moore devices based computational accelerators for key HPC applications and algorithms
- Publish work in academic journals and present it at conferences and workshops
- Lead and assist in the preparation of proposals for funding
- Mentor graduate students and postdocs
Skills
- PhD or equivalent in a Computing Science or Computer Engineering-related scientific discipline
- Mandatory 3 Years of Postdoctoral research experience or equivalent research experience
- Past Experience in either Machine learning accelerators or SRAM array design or basic blocks of processor at transistor level and/or Superconducting circuit design
- Courses or experience in CAD for VLSI algorithms and C++ Programming
- Proficient in Spice Circuit Simulations, Verilog and hardware design in CMOS, FeFET, NCFET etc
- Familiarity with hardware EDA/CAD tools and evaluation/modelling tools in order to extend existing infrastructure to rapidly evaluate CMOS designs
- Demonstrated creativity, initiative and ability to design, develop and implement complex solutions in consultation with designated technical expert(s) and/or supervisor
- Experience and track-record writing technical papers and reports
- Experience with the use of script languages and system utilities such as configure, Perl, UNIX shell scripts, and 'make'
- Proven record of working effectively in a team, seeing projects through to completion, meeting deadlines, interacting with users, and thorough documentation of contributions
- Willingness to learn and develop skills in new topics
- Previous experience and publications in Processing-In-Memory and Logic-in-Memory architectures
- Experience with developing computational dynamical systems, including networks of coupled oscillators
- Experience with computational or systems neuroscience
- Experience with Superconducting Circuit simulation and design
- Experience with neuromorphic computing
- Experience with coding in C++/python for CAD tool development for ASIC design
- Experience with higher-level hardware design languages (HDLs) such as CHISEL, PyMTL, or others
- Experience with FPGA design flows
- Demonstrated ability to lead technical efforts with teams of people
Benefits
- Exceptional health and retirement benefits, including pension or 401K-style plans
- A culture where you’ll belong - we are invested in our teams!
- In addition to accruing vacation and sick time, we also have a Winter Holiday Shutdown every year.
- Parental bonding leave (for both mothers and fathers)
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