Note: The job is a remote job and is open to candidates in USA. Syenta is pioneering a new era in semiconductor manufacturing with their groundbreaking Localised Electrochemical Manufacturing (LEM) technology. The Substrate IC Package Design Engineer will play a critical role in designing advanced substrate IC packages and multi-layered interposers, focusing on high-performance chip-to-chip integration and complex substrate layouts.
Responsibilities
• Design large (>50mm), complex multi-layer substrate interposers with high pin counts and dense routing requirements
• Develop high-speed signal routing solutions capable of supporting >50GHz performance while minimizing signal integrity issues such as loss and crosstalk
• Ensure robust signal integrity (SI) and power integrity (PI) across all designs
• Optimize designs for thermal performance and reliability
• Perform DRC (Design Rule Check) and LVS (Layout vs. Schematic) verification for all substrate designs
• Develop and maintain detailed design documentation, specifications, and reusable guidelines for future interposer and substrate development
• Work closely with global, cross-functional teams across engineering disciplines to ensure design feasibility, manufacturability, and performance
• Partner with process, materials, and hardware teams to align design with fabrication capabilities and constraints
• Contribute to the establishment of internal best practices for substrate and interposer design
• Provide expertise in advanced packaging design, helping build this capability within Syenta
Skills
• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
• 5+ years of experience in substrate IC package design for high-performance processors or accelerators
• Extensive experience designing large-format substrate packages (>50mm) with complex, high-density layouts
• Deep expertise in high-speed signal design, including mitigation of crosstalk, reflections, and impedance mismatches
• Advanced proficiency in Allegro Package Designer (constraint management, routing, and design verification)
• Strong understanding of SI/PI principles and their application to package-level design
• Solid foundational knowledge across electrical, materials, thermal, and/or mechanical engineering disciplines
• Working knowledge of substrate manufacturing processes, design rules, and material properties
• Strong analytical and problem-solving skills, with the ability to operate effectively in a fast-paced, cross-functional environment
• Familiarity with Valor CAM350 or Calibre for package design reviews
• Experience designing for advanced packaging architectures (e.g. multi-chip modules, interposers, or similar high-density systems)
• Experience working in high-growth or startup environments
Benefits
• Early-stage equity opportunities
• Potential 401(k) and other benefits
• Comprehensive health, dental, and vision coverage plans, supported by Company
• Professional Growth – We’re scaling fast, so responsibilities can expand significantly in tandem with the business
• Team Events – Annual company event in Australia to collaborate and celebrate
• Work-Life Balance – Flexible leave policies and an understanding that meaningful work can coexist with a fulfilling personal life
• 15 days PTO and 10 days sick leave
Company Overview
• Enabling the transition to 2.5D and 3D chiplet stacking and increasing the performance of semiconductor chips to meet the growing demand. It was founded in 2022, and is headquartered in Sydney, New South Wales, AUS, with a workforce of 11-50 employees. Its website is https://www.syenta.com..