Note: The job is a remote job and is open to candidates in USA. Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute. In this role, you will focus on power modeling, analysis, and optimization to help design high-performance, power-efficient CPUs and SoCs, collaborating across multiple teams to define power requirements and drive power optimization efforts.
Responsibilities
- Lead and coordinate power management efforts across multiple teams
- Support Micro-Architecture and Architecture teams in meeting SoC power targets
- Establish power optimization budgets for all design blocks and implement validation runs throughout the design cycle
- Enhance existing power modeling and analysis methodologies
- Define tests and benchmarks for pre-silicon power analysis across all blocks
- Configure power analysis environments at both RTL and gate levels for comprehensive pre-silicon evaluation
- Review and assess power analysis reports at RTL and gate levels, identifying opportunities for improvement at the architectural, RTL, and synthesis stages
- Analyze power consumption based on workload activities executed in emulation environments
- Develop a thorough understanding of various CPU use cases, as well as Memory and PCIe workloads
- Utilize industry-standard power analysis tools such as Spyglass, Power Artist, Joules, and PrimePower
Skills
- Strong background in SoC and CPU architecture
- Solid CMOS design fundamentals
- Extensive knowledge of power reduction techniques across different levels of abstraction
- Proficient in interpreting results from various power estimation tools and translating them into actionable strategies for power reduction
- Experience in developing automated flows and scripting for data analysis and result consolidation
- Proficient in power analysis utilizing gate-level and RTL power analysis tools
- Strong knowledge of power analysis techniques and optimization strategies for CMOS designs
- In-depth understanding of power-saving methods such as clock-gating, power-gating, and DVFS
- Solid grasp of processor architecture and workload characteristics
- Experienced in programming and scripting with Perl, Python, and Tcl
- Skilled in conducting power analysis based on activity data from emulation environments
- Educational background in Electrical or Computer Engineering with: Bachelor's degree plus 8 years of relevant experience, or Master's degree plus 6 years of relevant experience, or PhD plus 3 years of relevant experience
Benefits
- Premium medical insurance, dental insurance, vision insurance, as well as income protection and a 401K retirement plan, so that you can feel secure in your health and financial future.
- Unlimited Flextime and 10+ paid holidays so that you can embrace a healthy work-life balance.
- A variety of healthy snacks, energizing espresso, and refreshing drinks to keep you fueled and focused throughout the day.
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