Note: The job is a remote job and is open to candidates in USA. Infotree Global Solutions is seeking a Physical Design Engineer to work on leading-edge technology node designs. The role focuses on RTL synthesis and physical design, design optimization, floor planning, design methodology, quality checks, and final signoff for large IP delivery.
Responsibilities
- This engineer will work on leading edge technology nodes designs. This includes automated synthesis and timing driven place and route of RTL blocks for high speed Datapath and control logic applications, automated design flows for clock tree synthesis, clock gating techniques, buffer/repeater insertion, scan stitching, design optimization for improved timing/power/area, and design cycle time reduction. You will also support floor planning, establishing design methodology, checks for logic equivalence, physical/timing/electrical quality, and final signoff for large IP delivery
Skills
- Major in EE, CS or related, master's degree with 3+ years or Bachelor with 5+ years working experience
- Experience in automated synthesis and timing driven place and route of RTL blocks
- Mainly in ICC2, fusion compiler, calibre and Prime Time
- Preferably with high designs or other high-performance IP designs
- Verilog experience preferred
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