About the Company
DPP is recruiting a Senior Designer Engineer for an opportunity with a client in the aerospace industry.
About the Role
This position focuses on ASIC and FPGA design, implementation, and verification. The selected engineer will work on digital ASICs, FPGAs, and potentially mixed-signal ASICs, contributing to design development, verification methodologies, timing analysis, and implementation troubleshooting.
The role involves collaboration with systems, firmware, architecture, and product engineering teams, along with support for laboratory integration and troubleshooting. The position is fully remote, with Huntsville, Alabama, or El Segundo, California, as preferred locations.
Work Arrangement: Fully Remote
Location Preference: Huntsville, AL, or El Segundo, CA
Contract Duration: 8 months
Employment Type: W-2 Contract
Key Responsibilities
Design and develop digital ASICs, FPGAs, and/or mixed-signal ASICs.
Implement designs using hardware description languages (HDLs), including VHDL, Verilog, and/or SystemVerilog.
Develop verification methodologies and test benches for block-level and system-level verification.
Create and execute test plans, develop test harnesses, and implement coverage models.
Conduct timing analysis, noise analysis, and other design signoff checks.
Collaborate with systems, firmware, architecture, and product engineering teams.
Support laboratory integration and troubleshooting activities.
Identify and resolve design issues, including timing, congestion, and other implementation challenges.
Required Qualifications
7+ years of experience in ASIC design and implementation.
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline.
Experience with FPGA and ASIC design.
Proficiency in HDL programming using VHDL, Verilog, and/or SystemVerilog.
Experience working in a Linux development environment.
Experience with design verification and test bench development.
Preferred Qualifications
Advanced degree (MS or PhD) in Electrical Engineering, Computer Engineering, or a related field.
Experience across the full ASIC/FPGA lifecycle, including architecture, design, simulation, verification, validation, integration, and testing.
Experience with Software-Defined Radio (SDR) architectures, ADC/DAC, and/or digital signal processors (DSPs).
Knowledge of DSP and communications systems, including spread spectrum, forward error correction, and modulation types such as QPSK, QAM, PCM/FM, and PAM.
Strong object-oriented programming and scripting skills using Python, TCL, and Perl.
Experience with physical design flows and industry-standard electronic design automation (EDA) tools.
Experience with RTL2GDSII physical design and signoff flows.
Knowledge of deep sub-micron FinFET and CMOS technologies.
Experience with Design for Test (DFT), Scan, MBIST, and LBIST methodologies.
Experience mentoring junior engineers.